Designing with the Versal Adaptive SoC: Network on Chip

Course Description

This course introduces the Versal™ Adaptive SoC network on chip (NoC) to users familiar with AMD Xilinx devices. Besides providing an overview of the major components in the Versal device, the course illustrates how the NoC is used to efficiently move data within the device. The emphasis of this course is on:

  • Enumerating the major components comprising the NoC architecture in the Versal Adaptive SoC
  • Implementing a basic design using the NoC
  • Configuring the NoC for efficient data movement

Release Date

January 2022

Training Duration

1 day

Who Should Attend?

Hardware developers and system architects whether migrating from existing AMD Xilinx devices or starting out with the Versal Adaptive SoC devices

Prerequisites

  • Any AMD Xilinx device architecture class
  • Familiarity with the Vivado® Design Suite

Skills Gained

After completing this comprehensive training, you will know how to:

  • Enumerating the major components comprising the NoC architecture in the Versal Adaptive SoC
  • Implementing a basic design using the NoC
  • Configuring the NoC for efficient data movement

Course Outline



  • Architecture Overview for Existing Xilinx AMD Users
  • Versal Adaptive SoC Compared to Zynq UltraScale+ Devices/li>
  • Versal Adaptive SoC: NoC Introduction and Concepts
  • Versal Adaptive SoC: NoC Architecture
  • Versal Adaptive SoC: Design Tool Flow (NOC)
  • Versal Adaptive SoC: NoC DDR Memory Controller
  • Versal Adaptive SoC: NoC Performance Tuning
  • Versal Adaptive SoC: System Design Migration
  • Designing with the Versal Adaptive SoC: Network on Chip Full Course Quiz

Event Schedule

so-logic (top1) (Austria)
  • 21.06. - 21.06.2024 09:00-17:00 — € 800.00 excl. VAT Add to cart
  • 20.09. - 20.09.2024 09:00-17:00 — € 800.00 excl. VAT Add to cart
  • 20.12. - 20.12.2024 09:00-17:00 — € 0.00 excl. VAT Add to cart

Partner

Xilinx
Updated at: to the top