INTRODUCTION
Motivation
Purpose of this Tutorial
Objectives of this Tutorial
One Possible Solution for the Modulator Design
About HLS
Design Steps
Vivado HLS Design Flow
DEVELOPING CUSTOM IP CORE USING HLS
Create a New HLS Component
Develop C Algorithm
Add Sources to the Vitis Component
Verify C Algorithm
C Simulation Output Files
Synthesize C Algorithm into an RTL Implementation (High-Level Synthesis)
C Synthesis Output Files
Applying Optimization Directives
Verify the RTL Implementation
Using C/RTL Co-Simulation
Analyzing RTL Simulations
Package the RTL Implementation
USING DEVELOPED IP CORE IN VIVADO DESIGN SUITE
Create a New Project with Included Developed IP Core
Create ARM-based Hardware Platform with Integrated Developed IP Core
Debug the Design with Included Developed IP Core
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