• INTRODUCTION
    • Motivation
    • Purpose of this Tutorial
    • Objectives of this Tutorial
    • One Possible Solution for the Modulator Design
    • About HLS
    • Design Steps
    • Vivado HLS Design Flow
  • DEVELOPING CUSTOM IP CORE USING HLS
    • Create a New Project
    • Develop C Algorithm
    • Verify C Algorithm
      • C Simulation Output Files
    • Synthesize C Algorithm into an RTL Implementation (High-Level Synthesis)
      • C Synthesis Output Files
      • C Synthesis Results
      • Clock, Reset, and RTL Output
      • Applying Optimization Directives
    • Verify the RTL Implementation
      • Using C/RTL Co-Simulation
      • Analyzing RTL Simulations
    • Package the RTL Implementation
      • Packaging IP using Vivado IP (.zip) Format
  • USING DEVELOPED IP CORE IN VIVADO DESIGN SUITE
    • Create a New Project with Included Developed IP Core
    • Create ARM-based Hardware Platform with Integrated Developed IP Core
    • Debug the Design with Included Developed IP Core