Advanced Features and Techniques of Embedded Systems Software Design

Course Description

This course will help software engineers fully utilize the components available in the Zynq® All Programmable System on a Chip (SoC) processing system (PS). This course covers advanced Zynq All Programmable SoC topics for the software engineer, including advanced boot methodology, the NEON co-processor, programming PS system-level function control registers, the general interrupt controller, the DMA, Ethernet, and USB controllers, and the various low-speed peripherals included in the Zynq All Programmable SoC processing system.

Release Date

March 2017

Level

Embedded Software 4

Training Duration

1 Day

Who Should Attend?

Software design engineers interested in fully utilizing the Zynq extensible processing platform

Prerequisites

  • Embedded Systems Software Design or equivalent knowledge
  • C or C++ programming experience
  • Conceptual understanding of embedded processing systems, including device drivers, interrupt routines, Xilinx Standalone library services, user applications, and boot loader operation
  • Experience developing software for embedded processor applications

Skills Gained

After completing this comprehensive training, you will know how to:

  • Implement an effective Zynq All Programmable SoC boot design methodology
  • Create an appropriate FSBL image for flash
  • Identify advanced Cortex™-A9 processor services for fully utilizing the capabilities of the Zynq All Programmable SoC
  • Analyze the operation and capabilities of the DMA controller in the Zynq All Programmable SoC
  • Examine the various Standalone library services and performance capabilities of the Ethernet and USB controllers in the Zynq All Programmable SoC
  • Describe the Standalone library services available for low-speed peripherals that are contained in the Zynq All Programmable SoC PS

Course Outline

  • Advanced Boot Methodology on the Zynq All Programmable SoC
  • Zynq All Programmable SoC Boot Details
  • Demo: Create a Boot Image
  • Lab 1: Boot Loading from Flash/SD Card
  • Advanced Cortex-A9 Processor Services
  • Advanced DMA Controller Configuration on the Zynq All Programmable SoC
  • Lab 2: Performance Analysis of DMA Usage
  • High-Speed Peripheral Configuration on the Zynq All Programmable SoC
  • Lab 3: Introduction to lwIP (lightweight IP stack)
  • Low-Speed Peripherals on the Zynq All Programmable SoC
  • Lab 4: Sharing PS Resources with the MicroBlaze Processor – Software

Lab Descriptions

  • Lab 1: Boot Loading from Flash/SD Card – Explore the principles of creating a bootable flash image based on a First Stage Bootloader (FSBL) project.
  • Lab 2: Performance Analysis of DMA Usage – Analyze the performance of DMA transfers within a memory or between two different kinds of memory by using the TCF profiler.
  • Lab 3: Introduction to lwIP – Add the lightweight Internet Protocol (lwIP) stack to an embedded system and use it in a simple Standalone library application. The complete design includes both hardware and software.
  • Lab 4: Sharing PS Resources with MicroBlaze Processor – Explore separate software applications on the Cortex-A9 and MicroBlaze™ processors that share DDR3, PL block RAM, PS timer, and PS UART resources. The applications demonstrate passing messages between the two processors and simple semaphore usage.

Event Schedule

No events found. Event request.

Partner

Xilinx
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