Advanced Features and Techniques of Embedded Systems Design

En

Course Description

Advanced Features and Techniques of Embedded Systems Design provides embedded systems developers the necessary skills to develop complex embedded systems and enables them to improve their designs by using the tools available in the Vivado® IP Integrator. This course also helps developers understand and utilize advanced components of embedded systems design for architecting a complex system in the Zynq® All Programmable System on a Chip (SoC) or MicroBlaze™ soft processor. This course builds on the skills gained in the Embedded Systems Design course. Labs provide hands-on experience with developing, debugging, and simulating an embedded system. Utilizing memory resources and implementing high-performance DMA are also covered. Labs use demo boards in which designs are downloaded and verified.

Release Date

May 2015

Level

Embedded Hardware 4

Training Duration

2 days

Who Should Attend?

Hardware, firmware, and system design engineers who are interested in Xilinx embedded systems development flow

Prerequisites

  • Embedded Systems Design course or experience with embedded systems design and Xilinx EDK tools
  • Basic C programming
  • Working knowledge of the Zynq All Programmable SoC or Microblaze processo

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:

  • Assemble an advanced embedded system
  • Take advantage of the various features of Zynq All Programmable SoC and Kintex™ FPGAs, Cortex™-A9 and Microblaze processors, including the AXI interconnect and various memory controllers
  • Apply advanced debugging techniques, including the use of the Vivado analyzer tool for debugging an embedded processor system and HDL system simulation for processor-based designs
  • Identify the steps involved in integrating a memory controller into an embedded system using the Cortex-A9 and MicroBlaze processors
  • Integrate an interrupt controller and interrupt handler into an embedded design
  • Design a flash memory-based system and boot load from off-chip flash memory

Course Outline

Day 1

  • Embedded Systems Design Review
  • Lab 1: Sharing PS Building a Complete System (Zynq AP SoC and MicroBlaze Processor)
  • Zynq All Programmable SoC Processing System Overview
  • Debugging Using the Runtime Logic Analyzer
  • Lab 2: Debugging on the Zynq All Programmable SoC
  • Block RAM Memory Controllers
  • External Memory Controllers for Static Memory
  • Memory Controllers for Dynamic RAM
  • Lab 3: Extending Memory Space with Block RAM (Zynq AP SoC)
  • Lab 4: Extending Memory Space with a DDR3 Controller (MicroBlaze Processor)

Day 2

  • Interrupts
  • AXI Streaming Interface
  • System Data Movement: Low Latency and High Bandwidth
  • Advanced Processor and Peripheral Interface Options
  • Lab 5: Configuring DMA on the Zynq All Programmable SoC
  • Advanced Processor Configurations
  • Software Boot and PL Configuration
  • Lab 6: Boot Loading from Flash Memory (Zynq AP SoC)
  • HDL System Simulation with an Embedded Processor
  • Lab 7: Simulating an Embedded Processor System (MicroBlaze Processor)
  • Lab 8: Sharing PS Resources with a MicroBlaze Processor – Hardware

Lab Descriptions

  • Lab 1: Building a Complete System (Zynq AP SoC and MicroBlaze Processor) – Develop hardware that incorporates the Zynq All Programmable SoC PS or MicroBlaze processor IP cores to interface to AXI GPIO peripherals and serial communication. Use the SDK development tools to create an embedded software application project for the hardware built.
  • Lab 2: Debugging on the Zynq All Programmable SoC – Evaluate debugging the hardware and software components of a Zynq All Programmable SoC design.
  • Lab 3: Extending Memory Space with Block RAM (Zynq AP Soc) – Use the Vivado IP integrator to extend the memory resources for the Cortex-A9 processor.
  • Lab 4: Extending Memory Space with a DDR3 controller (MicroBlaze Processor) – Use the Vivado IP integrator to extend the memory resources for the MicroBlaze processor.
  • Lab 5: Configuring DMA on the Zynq All Programmable SoC – Program the DMA controller on the Zynq All Programmable SoC PS and explore the various Standalone library services that support the Zynq All Programmable SoC PS DMA controller.
  • Lab 6: Boot Loading from Flash Memory (Zynq AP Soc) – Develop an application that is stored in flash memory, load it through a boot loader program, and execute a software application from external memory for the Cortex-A9 Processor.
  • Lab 7: Simulating an Embedded Processor System (MicroBlaze Processor) – Develop the process of simulating a complete design including an embedded system component using the Vivado simulator. Use SDK to create a new workspace/software application project and build a simple software application that will be included in the simulation.
  • Lab 8: Sharing PS Resources with a MicroBlaze Processor – Add peripherals to a Zynq All Programmable SoC design and connect the PS to a PL processor (i.e., a MicroBlaze processor to share PS resources). Generate the netlists and bitstream of the complete design.

Event Schedule

so-logic (top1) (Austria)
  • 31.01. - 01.02.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
  • 21.03. - 22.03.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
  • 02.05. - 03.05.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
  • 20.06. - 21.06.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
  • 26.09. - 27.09.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
  • 14.11. - 15.11.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart

Partner

Xilinx
Updated at: 2016-08-03 12:26to the top