Staff

• Peter Thorwartl was born in Vienna in 1968
• Primary School
• College for Communication Engineering
• Degree in Electrical Engineering
• Graduated 1996, Vienna University of Technology - Professors Paschke, Pötzl, Prechtl, Hoffmann, Mecklenbräuker
• During his studies teaching assistant at the Vienna University of Technology
• From 1991 to 1997 Teacher at the College for Communications Engineering in Vienna
• 1997 Alternative Service at Allgemeines Krankenhaus Vienna (Austria's largest hospital)
• 1996 to 2000 lectures about FPGA Design at University of Technology
• 1997 Foundation of the so-logic GmbH & Co KEG
• 2000 Xilinx Training Center for FPGA Design
• 2003 to 2004 lectures about FPGA and Computer Architecture at University of Applied Science in Vienna
• 2008 lectures about Embedded Systems University of Applied Science in Wiener Neustadt

Iearned my experience at the leading university institute in Central and Eastern Europe. Besides my scientific work he was teaching at the university and technical schools.

I was born in Biella in 1973.

I have studied electronics at secondary school, then at the Politecnico of Torino, and finally, in 2004, I have taken my Master's degree at CEFRIEL. From those days I have worked as a freelance in Italy, expecially in project that using high-speed links (GbE, FC, SONET, SDH, etc...), or data transmission (modem, DVB, etc...). In 2005 I teach my first course as XILINX ATP in Italy.

My idea of work is first to grow in experience and knowledge, and then teach it to the others.

• Born at 11th of August, 1986
• 1996-2000 Elementary School St. Andrä Wördern
• 2000-2006 Higher Technical School, TGM vienna
• Since 2006 Eletrotechnical Engineering and Design at the University of Technology in Vienna
• 2008 started working at so-logic

I was born in a little village near Klosterneuburg in 1986. During our final year at the TGM, a respected higher technical school, in the departement for electronics, three friends and i built a robot with various functions and features. Since then I am fascinated with robotics and I think the near future of robot intelligents lies within neuronal nets, realised in FPGAs. So I came to the best place to learn about FPGAs -> so-logic. After finishing the TGM I started to study Eletrotechnical Engineering and Design at the University of Technology in Vienna.

• 1975 born in Krems
• 1992 graduation at BFS "aeronautics" in Langenlebarn
• 1997 graduation at HTL "communications engineering" in Vienna
• 1997 Philips Tone testing of fax machines Development of automated test systems
• 1999 Neuroth / Analog Devices Inc.Test hardware development and measurement for HDSL chips, ASIC design and simulation of a G.SHDSL chip
• 2003 On-demand Microelectronics Test hardware development ASIC design of a vector processing (VSP) chip
• 2004 SoLogic FPGA design (Xilinx) for various customers (CPU peripherals, SDI SD/HD video, PCIe, etc.ASIC design of the VSP video (SVEN) chip)

• Christian Gleiss was born in Vienna in 1972
• 1991 graduation with honors at HTBLuVA "electronics and informatics"
• 1991-1992 military service
• miscellaneous practical works
• 2002 graduation with honors at Vienna University of Technology "electrical engineering / computer science / biomedical technics"
• 2002-2008 hardware developer at international austrian company for space technology (ASIC/FPGA design and verification engineer)

I was born in Novi Sad in 1981.

In 2008 I have graduated from the Faculty of Technical Sciences in Novi Sad, at the department of Microprocessor Electronics. My Master thesis was in the area of embedded system design using FPGAs.

My hobbies are sports and reading.

• 1989 I started studying Electrical Engineering / Computer Technology at the Vienna University of Technology
• 1996 together with a friend we established our own company for professional audio and broadcast engineering
• 2003 the company changed it's focus so I left with all the engineering equipment which since
• 2004 is housed at so-Logic

Currently I'm concentrating on circuit design and PCB layout of complex FPGA based systems

Areas of my expertise:

• High-Speed Design / Signal Integrity, EMC
• FPGA, CPLD Design
• Multilayer, rigid-flex, HDI PCBs
• CAD library development
• Microcontroller / embedded systems
• Analog (audio) design
• Firmware (Assembler, C)
• Mechanical Design (In-House CNC workshop)
• Prototyping & rework

My motto:

Engineering is the art of making what you want from things you can get.

I was born in Mistelbach. I had my first experience with embedded systems with my RTLinux project at the HTL Hollabrunn. Now I'm embedded system designer. I connect the hardware world with the software world. By the way I study electronic engineering at the technical university of Vienna. There I can expand my experience in the areas embedded Linux, embedded design and logic design.

• Born in Iran
• Lived and studied in Canada
• Education: B.Eng in Systems Engineering from Carleton U. Ottawa/Canada
• Experience (SW): Testing & Verification of GSM/(D)AMPS/CDMA base OSS/BSS systems
• Experience(HW): Hardware/Software Testing & Verification at so-Logic
• Have work in: Austria, Belgium, Canada, Germany, Holland, and the U.S.
• Technical interests: FPGA, Analog & Dig ital Electronics
• Non-Technical interests: Reading, Photography

• 1974 born in Novi Sad / Serbia
• 1999 BSEE, Electronics and Telecommunications at the University of Novi Sad
• 2005 MSc, Electronics and Telecommunications at the University of Novi Sad

Experience:

• 1999-2001 Research Assistant at the University of Novi Sad: development of new algorithm for neural network training based on decision trees
• 1999-2000 Hardware Engineer: development of the PC based logic analyzer
• 1999-2001 Teacher at the University of Novi Sad: teaching assistant for Circuits Theory- and Discrete Systems/Algorithms course
• 2000-2001 Hardware Engineer for Electra d.o.o.: development of the digital scale
• 2002- Research Assistant at the University of Novi Sad: fault tolerant digital design, reconfigurable, evolvable and embryonic hardware
• 2002- Teacher at the University of Novi Sad: teaching assistant for Discrete Systems and Algorithms, Microprocessor Electronics and Computer Electronics course
• 2003-2004 Hardware Engineer for Atotek d.o.o.: development of 8051 Microcontroller IP Core
• 2004-2005 Research Engineer at Delphi Electronics & Safety: disparity discrimination using genetic programming
• 2005 Hardware Engineer for so-Logic: development of the Motion JPEG core for Xilinx FPGA IC's
• 2005-2006 Hardware Engineer for so-Logic: development of the arbitrary rate sample rate converter system for Xilinx Virtex4 FPGA IC
• 2006-2007 Hardware Engineer for so-Logic: design, simulation and verification of the modified 8 by 8 DCT core, 8 by 8 IDCT core and Huffman/Run-Length Encoder and Decoder cores for Xilinx FPGA

I was born in Brasil and speak following languages: Portuguese, Italian, English, Spanish, German.

I was born 1984 in Gmünd/Austria. During my education I graduated at the following schools:

• HTBLA Karlstein/Thaya - Commercial School of Microelectronics
• HTBLA Vienna 10 - College of Electronics and IT
• University of Applied Science (FH Campus Vienna) - Information Technology and Telecommunication
• Technical University Vienna - Computer Management (finishing soon ;-))

As a freelancer I was able to gather many valuable experiences in the IT and Embedded Systems field.

Next to work I like to spend time with my girlfriend and of course sport.