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13.02. - 13.02.2012 09:00-17:00
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Design Techniques for Lower Cost
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 650.00
|
Add to cart
|
|
13.02. - 13.02.2012 09:00-17:00
|
Essentials of FPGA Design
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 650.00
|
Add to cart
|
|
14.02. - 15.02.2012 09:00-17:00
|
Designing for Performance
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
16.02. - 17.02.2012 09:00-17:00
|
Advanced FPGA Implementation
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
20.02. - 21.02.2012 09:00-17:00
|
Minimizing Your Design Time with the ChipScope Pro Debug and Verification Tools
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
20.02. - 21.02.2012 09:00-17:00
|
Partial Reconfiguration
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
22.02. - 23.02.2012 09:00-17:00
|
TMRTool
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
27.02. - 29.02.2012 09:00-17:00
|
Designing with Multi-Gigabit Serial I/O
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,950.00
|
Add to cart
|
|
01.03. - 02.03.2012 09:00-17:00
|
Designing a LogiCORE PCI Express System
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
01.03. - 02.03.2012 09:00-17:00
|
Gigabit Ethernet
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
05.03. - 07.03.2012 09:00-17:00
|
Signal Integrity and Board Design for Xilinx FPGAs
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,950.00
|
Add to cart
|
|
08.03. - 09.03.2012 09:00-17:00
|
Signal Integrity for High-Speed Memory and Processor I/O
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
12.03. - 12.03.2012 09:00-17:00
|
How to Design a Xilinx Digital Signal Processing DSP System
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 650.00
|
Add to cart
|
|
13.03. - 14.03.2012 09:00-17:00
|
DSP Design Using System Generator
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
15.03. - 16.03.2012 09:00-17:00
|
DSP Implementation Techniques for Xilinx FPGAs
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
19.03. - 20.03.2012 09:00-17:00
|
Designing with the Xilinx 7 Series Families
|
Xilinx
|
so-logic (top1) (Austria)
|
€ 1,300.00
|
Add to cart
|
|
24.03. - 24.03.2012 09:00-17:00
|
FPGA Power Optimization
|
so-logic
|
so-logic (top1) (Austria)
|
€ 650.00
|
Add to cart
|