Designing with the Versal Adaptive SoC: Hardware Debug

This course describes the tools and techniques available to debug AMD Versal™ devices. You will learn about features for debugging the fabric (programmable logic) and the hard blocks. The course also covers ChipScoPy ...

Course Description

This course covers tools and techniques for debugging AMD Versal™ devices, including fabric (programmable logic) and hard block debugging. It also introduces ChipScoPy APIs, which provide a Python™ interface for programming and debugging Versal devices.

The emphasis of this course is on:

• Describing Versal device design flows
• Enumerating Versal device debug features for programmable logic (PL) and hard block debugging
• Debugging the Versal device using different debug IP cores
• Using ChipScoPy APIs for hardware debugging
• Improving Versal device system performance

Training Duration

9 hours

Additional Information

• Number of Chapters: 8
• Number of Labs: 3
• Number of Demos: 0
• Current Version: 2025.2

What's New

• All labs have been updated to the latest software versions

Chapters

Chapter 1

• AMD Versal Adaptive SoC: Design Tool Flow

Chapter 2

• AMD Versal Adaptive SoC: Configuration and Debugging

Chapter 3

• AMD Versal Adaptive SoC: Fabric Debug

Chapter 4

• AMD Versal Adaptive SoC: Hard Block Debug

Chapter 5

• AMD Versal Adaptive SoC: Overview of HSDP

Chapter 6

• AMD Versal Adaptive SoC: ChipScoPy Overview

Chapter 7

• AMD Versal Adaptive SoC: System Integration and Validation Methodology

Chapter 8

• Designing with the Versal Adaptive SoCs: Hardware Debug Full Course Quiz