Advanced SDSoC Development Environment and Methodology

Course Description

This two-day course is structured to help designers employ SDSoC™ development environment optimization techniques to create high-performance, accelerated systems. The focus is on optimizing memory access and hardware functions, generating C-callable IP libraries, and creating custom platforms. The course also includes an introduction to the Xilinx reVISION Stack.

Software Tools

SDx™ development environment 2017.4

Hardware

Architecture: Zynq-7000 SoC* Demo board: Zynq-7000 SoC ZC702 or ZedBoard* * This course focuses on the Zynq-7000 SoC. Check with your local Authorized Training Provider for the specifics of the in-class lab board or other customizations.

Skills Gained

After completing this comprehensive training, you will have the necessary skills to:
  • Improve the memory accesses and data transfer rate between the PS and PL (macro-architecture optimization)
  • Apply HLS directives to enhance the performance of hardware functions (micro-architecture optimization)
  • Create a C-callable library for IP blocks written in a hardware description language like VHDL or Verilog
  • Override tool defaults to improve the performance of individual accelerators and the overall system
  • Create a custom platform using the SDSoC Platform Utility (sdspfm)
  • Describe how the reVISION Stack enables users to quickly develop applications based on machine
  • learning and computer vision with the SDx development environment

    Event Schedule

    so-logic (top1) (Austria)
    • 19.12. - 20.12.2022 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 27.02. - 28.02.2023 09:00-17:00 — € 1,600.00 excl. VAT Add to cart

    Partner

    Xilinx
    Updated at: to the top