Site map
- so-logic
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- Activities
- Development2009-11-23 14:43
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- Knowledgebase
- FPGA Universe
- Tutorials
- Basic FPGA Tutorial - ISE v14.7, VHDL2015-12-18 19:36
- VHDL Style Guide2011-01-31 09:56
- Tutorials
- Links
- Electronic2009-11-26 13:38
- FPGA2009-11-26 13:47
- Useful2009-11-26 14:03
- Quick Reference Guides2009-11-26 14:09
- Newsletters
- Newsletter - September 20162016-09-16 10:39
- Newsletter - February 20162016-01-15 11:59
- Newsletter - November 20152015-10-29 15:32
- Newsletter - May 20152015-04-21 11:06
- Newsletter - March 20152015-04-21 11:02
- FPGA Universe
- Trainings
- Doulos
- Xilinx - Vivado FPGA Essentials (Online)2016-01-15 11:57
- Xilinx - Vivado Adopter Class (Live Online)2016-01-15 12:03
- Essential Tcl for Vivado (Online) 2016-01-15 12:09
- Xilinx - Vivado HLS (Online)2016-01-15 12:14
- Xilinx - Designing with the UltraScale Architecture (Online)2016-01-15 11:52
- Mathworks
- MATLAB Grundlagen2015-10-28 12:06
- Machine Learning mit MATLAB2017-06-27 11:02
- MATLAB Programmiertechniken2015-10-28 12:07
- Programmierung von Xilinx Zynq SoCs mit MATLAB und Simulink2015-10-28 12:08
- Simulink zur System- und Algorithmenmodellierung2015-10-28 12:10
- Signalverarbeitung mit Simulink2015-10-28 12:09
- Objektorientierte Programmierung mit MATLAB2017-06-27 11:01
- National Instruments
- Labview Basic I2012-01-18 16:35
- Compact RIO + FPGA2012-01-18 16:36
- so-logic
- Art of FPGA Design
- Principles of FPGA Design2011-12-26 09:16
- Use Cases for FPGAs2011-12-26 09:41
- High Speed Serial IOs with FPGA2009-12-04 11:20
- Embedded System Ideas and Concepts2018-01-26 14:36
- Implementation of a digital Receiver with FPGAs2009-12-04 11:40
- High Speed DSP Design with FPGAs2018-01-26 14:38
- Embedded System Design with FPGAs2009-12-04 11:14
- High Level Synthesis
- C++2011-12-27 08:02
- SystemC TLM2011-12-27 10:13
- SystemC Concepts2011-12-27 16:00
- Art of FPGA Design
- Xilinx
- Architecture
- Designing with the Zynq UltraScale+ RFSoC2018-11-11 13:02
- Zynq SoC System Architecture2018-11-11 13:07
- Designing with the UltraScale and UltraScale+ Architectures2016-08-03 09:26
- Designing with Xilinx 7 Series Families2016-08-03 09:43
- Designing with Spartan-6 and Virtex-6 Families2012-01-18 17:23
- Designing with Virtex-5 FPGA Family2012-09-10 10:16
- Connectivity
- Accelerating C C++ OpenCL & RTL Applications w SDAccel2018-11-11 12:43
- Accelerating C, C++, OpenCL, and RTL Applications with the SDAccel Environment2018-11-11 13:11
- How to Design a High-Speed Memory Interface2016-08-03 13:34
- PCIe Protocol Overview2012-09-28 11:10
- Designing an Integrated PCI Express System2018-11-11 13:55
- Designing with Multi-Gigabit Serial I/O2016-08-03 13:46
- Designing with Ethernet MAC Controllers2016-08-03 10:45
- Signal Integrity and Board Design for Xilinx FPGAs2013-07-01 13:11
- Designing with Xilinx Serial Transceivers2018-11-11 13:57
- Designing with UltraScale FPGA Transceivers2016-08-03 10:56
- DSP
- Essential DSP Implementation Techniques for Xilinx FPGAs2018-11-11 14:10
- DSP Design Using System Generator2018-11-11 13:59
- C-based Design: High-Level Synthesis with Vivado HLS2016-08-03 11:29
- C-based HLS Coding for Software Designers2012-09-28 12:16
- C-based HLS Coding for Hardware Designers2012-09-28 12:16
- Embedded
- Advanced SDSoC Development Environment and Methodology2018-06-13 11:45
- Developing AWS F1 Applications Using the SDAccel Environment2018-06-13 11:40
- Zynq All Programmable SoC System Architecture2016-08-03 11:42
- Embedded Open-Source Linux Development2018-11-11 14:00
- Embedded Design with PetaLinux Tools2016-08-03 11:50
- Embedded Systems Design2018-11-11 14:02
- Advanced Features and Techniques of Embedded Systems Design2016-08-03 12:26
- Embedded Systems Software Design2018-11-11 14:02
- Advanced Features and Techniques of Embedded Systems Software Design 2018-11-11 14:03
- Embedded C/C++ SDSoC Development Environment and Methodology2018-11-11 14:01
- Zynq UltraScale+ MPSoC for the Hardware Designer 2018-11-11 14:05
- Zynq UltraScale+ MPSoC for the Software Developer2018-11-11 14:05
- Zynq UltraScale+ MPSoC for the System Architect 2018-11-11 14:06
- Developing and Optimizing Applications Using the OpenCL Framework for FPGAs2017-03-22 13:10
- Languages
- Designing with VHDL2018-11-11 14:09
- Advanced VHDL2018-11-11 14:07
- Designing with Verilog2018-11-18 10:36
- Designing with System Verilog2018-11-11 14:08
- Verification with System Verilog2018-11-11 14:11
- Tools
- Vivado Design Suite for ISE Project Navigator Users2018-11-11 13:04
- Designing FPGAs Using the Vivado Design Suite 12018-11-18 10:45
- Designing FPGAs Using the Vivado Design Suite 22018-11-18 10:46
- Designing FPGAs Using the Vivado Design Suite 32018-11-18 10:46
- Designing FPGAs Using the Vivado Design Suite 42018-11-18 10:46
- UltraFast Design Methodology2018-11-18 10:44
- Vivad Design Suite for ISE Software Project Navigator Users2013-07-02 13:40
- Vivado Advanced XDC and Static Timing Analysis for ISE Software Users2018-11-18 10:48
- Partial Reconfiguration Tools & Techniques2018-11-18 10:43
- Architecture
- Payment conditions2010-01-04 15:36
- Instruction2012-01-10 09:24
- Doulos
- IP Cores
- Interface Cores
- Ethernet
- 10/100/1000 Mb/s Ethernet
- 10/100/1000 Mb/s MAC Controller Core2016-08-19 16:27
- 1000BASE-X PCS Core2016-08-22 19:17
- 10G Ethernet
- 10G MAC Controller Core2016-08-22 19:18
- 10GBASE-R PCS Core2016-08-22 19:14
- 10/100/1000 Mb/s Ethernet
- Serial ATA
- SATA-II Host Controller Core2016-08-19 10:11
- SATA-III Host Controller Core2016-08-19 10:09
- Ethernet
- Machine Learning Cores
- Ensemble Classifiers Cores
- Ensemble Inference Cores
- Decision Tree Ensemble Inference Core2011-01-15 22:22
- Ensemble Evaluation Cores
- Decision Tree Ensemble Evaluation Core - Sequential Evaluation using Pipelined Architecture2010-11-20 14:50
- Decision Tree Ensemble Evaluation Core - Parallel Evaluation using Pipelined Architecture2010-11-20 14:51
- Decision Tree Ensemble Evaluation Core - Sequential Evaluation using Serial Architecture2010-11-20 14:54
- Decision Tree Ensemble Evaluation Core - Parallel Evaluation using Serial Architecture2010-11-20 14:55
- Combination Rules Cores
- Behavior Knowledge Space Core - Parallel Architecture2010-11-20 14:56
- Behavior Knowledge Space Core - Serial Architecture2010-11-20 14:56
- Weighted Majority Voting Core - Parallel Architecture2010-11-20 14:57
- Majority Voting Core - Parallel Architecture2010-11-20 14:57
- Majority Voting Core - Serial Architecture2010-11-20 14:58
- Ensemble Inference Cores
- Decision Trees Cores
- Decision Tree Inference Core2010-11-20 14:58
- Decision Tree Core using Serial Architecture2010-11-20 14:59
- Decision Tree Core using Pipelined Architecture2010-11-20 14:59
- Ensemble Classifiers Cores
- Processor and Microcontroller Cores
- 8051 Microcontroller Cores2011-01-16 09:52
- Finished and IP Cores Under Development2016-08-18 17:11
- Interface Cores
- Customers