Majority Voting Core - Serial Architecture

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Index

General Description
Features
Applications
Deliverables
Licensing
Datasheet
Reference Design
Pricing and Additional Information

General Description

So_ip_ecr_mv_s core can be used to implement the several variants of the Majority Voting combination rule to calculate the ensemble classification of the instance based on the classifications supplied by the ensemble members. Ensemble members whose classifications are being combined can be of any type, decision trees, neural networks, support vector machines, or some other predictive models. Even more, the ensemble can be even composed from a mixture of different predictive models.

So_ip_ecr_mv_s core can be used to implement the following Majority Voting combination rule variants: unanimous voting, simple majority voting, plurality voting and weighted majority voting.

So_ip_ecr_mv_s core should be used in conjunction with some ensemble evaluation module that is able to calculate the instance classifications for ensemble members sequentially, one at a time. Using these classifications, so_ip_ecr_mv_s core can calculate the combined classification of the current instance. Since the combination of the individual members classifications is done sequentially, the classification speed of this core is not so fast, but the core requires significantly less resources for the implementation.

So_ip_ecr_mv_s core is delivered with fully automated testbench and a compete set of tests allowing easy package validation at each stage of SoC design flow.

The so_ip_ecr_mv_s design is strictly synchronous with positive-edge clocking, no internal tri-states and a synchronous reset.

The so_ip_ecr_mv_s core can be evaluated using any evaluation platform available to the user before actual purchase. This is achieved by using a time-limited demonstration bit files for selected platform that allows the user to evaluate system performance under different usage scenarios.

For more information about the so_ip_ecr_mv_s core please consult the corresponding datasheet.

Features

  • Implements several variants of the Majority Voting combination rule that can be used to combine the classifications of individual ensemble members into one, collective classification
  • Can be used to implement the following Majority Voting rules: unanimous voting, simple majority voting, plurality voting and weighted majority voting
  • Combination of individual members classifications is done sequentially, resulting in area efficient design
  • Ensemble members can be of any type, for example decision trees, neural networks, support vector machines, etc.
  • Ensemble can be composed from a mixture of different predictive models
  • No special IP blocks are needed to implement the core, only memory, adders and multipliers

Applications

  • Speech and handwriting recognition
  • Computer vision
  • Machine perception
  • Pattern recognition
  • Medical diagnosis
  • Robot locomotion

Deliverables

Source code (source code license only)

  • VHDL Source Code

VHDL verification environment

  • Tests with reference responses

Technical documentation

  • Installation notes
  • HDL core specification
  • Datasheet

Instantiation templates

Reference design

Technical support

  • IP Core implementation support
  • Variable length maintenance
  • Delivery of IP Core updates, minor and major changes
  • Delivery of documentation updates
  • Telephone & email support

Licensing

Netlist License

  • Post-synthesis netlist
  • Self checking testbench
  • Test vectors for testing the core
  • Place&Route scripts
  • Constraints
  • Instantiation templates
  • Documentation

VHDL Source License

  • VHDL RTL source code
  • Complete verification plan together with testbenches needed to verify correct operation of the core
  • Self checking testbench
  • Vectors for testing the functionality of the core
  • Simulation & synthesis scripts
  • Documentation

Datasheet

For more information about the So-Logic ensemble combination rule core, please see the following datasheet:

Reference Design

Reference design for the so_ip_ecr_mv_s ensemble combination rule core is avaiable upon the request. Reference design comes in a form of bit file for user specified platform. Using this reference design, customer can evaluate the functionality and performance of the core for limited period of time. For more information about the reference design, please contact So-Logic at ip_ecr_mv_s@so-logic.net.

Pricing and Additional Information

Pricing of so_ip_ecr_mv_s ensemble combination core varies, and is dependent on the license type. For information about the pricing, license types, additional documents, performance, example applications, or any other information regarding the so_ip_ecr_mv_s ensemble combination core, please contact So-Logic at:

Phone: +43-1-315 77 77-11
Fax:     +43-1-315 77 77-44
email:  ip_ecr_mv_s@so-logic.net

Updated at: 2010-11-20 14:58to the top