10GBASE-R PCS Core

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Index

General Description
Features
Supported FPGA Families and Development Tools
Applications
Deliverables
Licensing
Documentation
Reference Design and Evaluation Version
Pricing and Additional Information

General Description

So-Logic's 10GBase-R PCS/PMA core implements 1000Base-X PCS/PMA sublayer from the IEEE Std. 802.3-2008 specification.

It can use any available Xilinx MGT transceivers to implement required physical signaling. For the interface with the MAC layer core uses standard XGMII-SDR interface.

The so_ip_eth_10GBaseR_pcs_pma core can be evaluated using Xilinx Evaluation Platforms before actual purchase. This is achieved by using a demonstration bit files for KC705 platform that allows the user to connect the So-Logic's complete 10G Ethernet solution system to some other Ethernet enabled device (PC or some Ethernet tester equipment) and evaluate system performance under different transfer scenarios.

For more information about the 10GBase-R PCS/PMA Controller core please consult the corresponding datasheet.

Features

  • Fully compliant with the IEEE Std. 802.3-2008 specification
  • AXI4-Stream user side interface for transmission and reception of Ethernet frames
  • Supports XGMII-SDR as well as providing connectivity to So-Logic’s 10GBase-R PCS/PMA core
  • Low frequency operation
    • IP Core system clocks at 156.25 MHz for 10 Gb/s data rates
  • Configuration and monitoring through an AXI4-Lite interface
  • MAC flow control pause frame support
  • Statistic counters
  • Configurable interframe gap
  • Automatic padding and FCS calculation
  • Configurable support for the jumbo frames
  • Configurable maximum frame length check
  • Configurable receive address filter

Supported FPGA Families and Development Tools

10GBase-R PCS/PMA Controller core currently supports following Xilinx FPGA device familes:

  • Zynq-7000
  • Artix-7
  • Kintex-7
  • Virtex-7
  • Virtex-6
  • Spartan-6
  • Virtex-5

10GBase-R PCS/PMA Controller core currently supports following Xilinx development tools:

  • Xilinx Vivado Design Suite

Applications

  • LAN networking
  • Industrial Ethernet
  • Distributed Storage Area Networks
  • Cloud computing

Deliverables

Source code (source code license only)

  • VHDL Source Code

VHDL verification environment

  • Tests with reference responses

Technical documentation

  • Datasheet
  • Installation notes
  • User manual

Instantiation templates

Example application

Technical support

  • IP Core implementation support
  • Variable length maintenance
  • Delivery of IP Core updates, minor and major changes
  • Delivery of documentation updates
  • Telephone & email support

Licensing

Netlist License

  • Post-synthesis netlist
  • Self checking testbench
  • Test vectors for testing the core
  • Place&Route scripts
  • Constraints
  • Instantiation templates
  • Documentation

VHDL Source License

  • VHDL RTL source code
  • Complete verification plan together with testbenches needed to verify correct operation of the core
  • Self checking testbench
  • Vectors for testing the functionality of the core
  • Simulation & synthesis scripts
  • Documentation

Documentation

Datasheet

For more information about the So-Logic 10GBase-R PCS/PMA Controller core, please see the following datasheet:

  • 10GBase-R PCS/PMA Controller core Datasheet

Reference Design and Evaluation Version

Reference design as well as evaluation netlist are available for the 10GBase-R PCS/PMA Controller core upon the request.

Reference design comes in a form of bit file for Zynq-7000, Artix-7, Kintex-7, Virtex-7, Virtex-6, Spartan-6 and Virtex-5 Xilinx FPGA Evaluation Platforms. Using this reference design, customer can connect it's Ethernet enabled device (network analyzer or PC) to the 10GBase-R PCS/PMA Controller core and evaluate the functionality and performance of the core.

Evaluation netlists are also available upon a request. Using evaluation netlist user can integrate 10GBase-R PCS/PMA Controller core into its specific application-related design and evaluate 10GBase-R PCS/PMA Controller core performance in the target application for a limited period of time.

For more information about the reference design, please contact So-Logic at ip_ethernet@so-logic.net.

Pricing and Additional Information

Pricing of 10GBase-R PCS/PMA Controller core varies, and is dependent on the license type. For information about the pricing, license types, additional documents, performance, example applications, or any other information regarding the 10GBase-R PCS/PMA Controller core, please contact So-Logic at:

Phone: +43-1-315 77 77-11
Fax: +43-1-315 77 77-44
email: ip_ethernet@so-logic.net

 

Updated at: 2016-08-22 19:14to the top