Versal Compendium 2 : High Speed Communication

Each day with a lot of presentation and demonstration all virtual on your screen!

  • Multigigabit Transceiver MGT
  • High Speed Communication Hard IP
  • Provides a system-level understanding of power and thermal issues related to designing
  • Enumerating the major components comprising the NoC architecture in the Versal ACAP
  • Implementing a basic design using the NoC
  • Configuring the NoC for efficient data movement

Agenda

  • 9:00 - 10:30 Network On Chip NoC Concept
  • 10:45 - 12:15 High Speed Communication (PCIe, GT, CCIX, 100G)
  • 13:00 - 14:30 Memory Hierachy (LUT, BRAM, URAM, OCM, TCM, DDR)
  • 14:45 -16:15 PCB Guidelines (Packages, Thermal Solution, Power Supply)
  • 16:15 Q&A

Event Schedule

so-logic (top1) (Austria)
  • 20.09. - 20.09.2021 09:00-17:00 — € 100.00 excl. VAT Add to cart

Partner

so-logic
Updated at: 2021-08-18 22:47:40 +0200to the top