Designing with the Versal AI Edge Series Gen 2 and Prime Series Gen 2: Architecture

Learn about the AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2 adaptive SoC architectures, which combine programmable logic with a new high-performance processing system and next-generation AI Engines. Also learn how these devices facilitate end-to-end acceleration and maximize system performance for embedded systems—all in a single device built on a foundation of enhanced safety and security. The emphasis of this course is on: Describing the different compute resources available in the Versal adaptive SoC Explaining the new high-performance processing system (PS) Describing the next-generation AI Engine architecture Describing the network on chip (NoC) resources Outlining the available DDR5/LPDDR5X memory controller support Reviewing the new image and video processing hard blocks Explaining the functional safety and security enhancements Identifying the available PCI Express® Gen 5 and 32G high-speed serial transceiver solutions What's New: Added a new lab: Linux Application Development Using the Embedded Development Framework All labs have been updated to the latest software versions

Course Description

Learn about the AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2 adaptive SoC architectures, which combine programmable logic with a new high-performance processing system and next-generation AI Engines. Also learn how these devices facilitate end-to-end acceleration and maximize system performance for embedded systems—all in a single device built on a foundation of enhanced safety and security.

The emphasis of this course is on:

• Describing the different compute resources available in the Versal adaptive SoC
• Explaining the new high-performance processing system (PS)
• Describing the next-generation AI Engine architecture
• Describing the network on chip (NoC) resources
• Outlining the available DDR5/LPDDR5X memory controller support
• Reviewing the new image and video processing hard blocks
• Explaining the functional safety and security enhancements
• Identifying the available PCI Express® Gen 5 and 32G high-speed serial transceiver solutions

Training Duration

23 hours

Additional Information

• Number of Chapters: 16
• Number of Labs: 7
• Number of Demos: 0
• Current Version: 2025.2

What's New

• Added a new lab: Linux Application Development Using the Embedded Development Framework
• All labs have been updated to the latest software versions

Chapters

Chapter 1

• AMD Versal™ Adaptive SoC: Introduction and Portfolio Overview

Chapter 2

• AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2: Architecture Overview

Chapter 3

• AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2: Design Tool Flow

Chapter 4

• AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2: Programmable Logic (PL)

Chapter 5

• AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2: SelectIO™ Resources

Chapter 6

• AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2: Processing System

Chapter 7

• Versal AI Edge Series Gen 2 & Prime Series Gen 2: Platform Management Controller

Chapter 8

• AMD Versal™ AI Edge Series Gen 2 Boot and Configuration

Chapter 9

• AMD Versal™ AI Edge Series Gen 2: AIE‑ML v2 Architecture Overview

Chapter 10

• AMD Versal™ AI Edge Series Gen 2: NoC Architecture

Chapter 11

• AMD Versal™ AI Edge Series Gen 2: Designing with DDR5

Chapter 12

• AMD Versal™ AI Edge Series Gen 2: Multimedia Hard Blocks

Chapter 13

• AMD Versal™ AI Edge and Prime Series Gen 2: Security and Functional Safety Overview

Chapter 14

• AMD Versal™ AI Edge Series Gen 2 and Prime Series Gen 2: PCI Express® Solutions

Chapter 15

• AMD Versal™ Adaptive SoC: Serial Transceivers

Chapter 16

• Designing with the Versal AI Edge Series Gen 2 and Prime Series Gen 2: Architecture Full Course Quiz