Designing FPGAs Using the Vivado Design Suite 1
This course offers introductory training on the AMD Vivado™ Design Suite and demonstrates the FPGA design flow for those uninitiated to FPGA design.
The course provides experience with:
Creating a Vivado Design Suite project with source files
Simulating a design
Performing pin assignments
Applying basic timing constraints
Synthesizing and implementing
Debugging a design
Generating and downloading a bitstream onto a demo board
Event Schedule
Virtual Learning Environment (Online)
- 08.10. - 09.10.2026 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
- 03.07. - 04.07.2026 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
- 16.02. - 17.02.2026 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
- 07.10. - 08.10.2025 09:00-17:00 — € 1,700.00 excl. VAT Add to cart