Designing FPGAs Using the Vivado Design Suite 2
Learn how to build a more effective FPGA design:
The focus is on:
Using synchronous design techniques
Utilizing the Vivado™ IP integrator to create a sub-system
Performing power analysis and optimization to improve the power efficiency of a design
Reviewing and analyzing timing reports for a design
Event Schedule
Virtual Learning Environment (Online)
- 09.10. - 10.10.2026 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
- 07.07. - 08.07.2026 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
- 16.02. - 17.02.2026 09:00-17:00 — € 1,700.00 excl. VAT Add to cart
- 09.10. - 10.10.2025 09:00-17:00 — € 1,700.00 excl. VAT Add to cart