Zynq UltraScale+ MPSoC for the Software Developer

En

Course Description

This two-day course is structured to provide software developers with a catalog of OS implementation options, including hypervisors, various Linux implementations, booting and configuring a system, and power management for the Zynq® UltraScale+™ MPSoC family.

Release Date

January 2018

Level

Embedded Software 3

Training Duration

2 days

Who Should Attend?

Software developers interested in understanding the OS and other capabilities of the Zynq UltraScale+ MPSoC device.

Prerequisites

  • General understanding of embedded and real-time operating systems
  • Familiarity with issues related to implementing a complex embedded system
  • Skills Gained

    After completing this comprehensive training, you will know how to:
  • Distinguish between asymmetric multi-processing (AMP) and symmetric multi-processing (SMP) environments
  • Identify situations when the ARM® TrustZone technology and/or a hypervisor should be used
  • Effectively use power management strategies and leverage the capabilities of the platform management unit (PMU)
  • Define the boot sequences appropriate to the needs of the system
  • Define the underlying implementation of the application processing unit (APU) and real-time processing unit (RPU) to make best use of their capabilities
  • Course Outline

    Day 1

  • Zynq UltraScale+ MPSoC Application Processing Unit {Lecture, Demo}
  • Zynq UltraScale+ MPSoC Real-Time Processing Unit {Lecture, Demo, Lab}
  • ARM TrustZone Technology {Lecture}
  • Introduction to QEMU {Lecture, Demo, Lab}
  • Zynq UltraScale+ MPSoC HW-SW Virtualization {Lecture, Lab}
  • Introduction to the Xen Hypervisor {Lecture, Lab} (pairs with OpenAMP, but not SMP)
  • OpenAMP {Lecture, Lab} (pairs with the Xen Hypervisor, but not SMP)
  • Symmetric Multi-Processing Linux {Lecture, Demo}
  • Day 2

  • Yocto and PetaLinux {Lecture, Demo, Lab}
  • Open Source Library/PetaLinux Tools {Lecture, Demo, Lab}
  • Zynq UltraScale+ MPSoC FreeRTOS {Lecture, Demo, Lab}
  • Zynq UltraScale+ MPSoC Software Stack {Lecture, Demo}
  • Zynq UltraScale+ MPSoC PMU Development and Debugging {Lecture, Lab}
  • Zynq UltraScale+ MPSoC Power Management {Lecture, Demo}
  • Zynq UltraScale+ MPSoC Boot and Configuration {Lecture, Lab}
  • Topic Descriptions

    Day 1

  • Zynq UltraScale+ MPSoC Application Processing Unit – Introduction to the members of the APU, specifically the Cortex™-A53 processor and how the cluster is configured and managed.
  • Zynq UltraScale+ MPSoC Real-Time Processing Unit – Introduction to the various elements within the RPU and different modes of configuration.
  • ARM TrustZone Technology – Illustrates the use of the ARM® TrustZone technology.
  • Introduction to QEMU – Introduction to the Quick Emulator, which is the tool used to run software for the Zynq UltraScale+ MPSoC device when hardware is not available.
  • Zynq UltraScale+ MPSoC HW-SW Virtualization – Covers the hardware and software elements of virtualization. The lab demonstrates how hypervisors can be used.
  • Introduction to the Xen Hypervisor – Description of generic hypervisors and discussion of some of the details of implementing a hypervisor using Xen.
  • OpenAMP – Introduction to the concept of OpenAMP.
  • Symmetric Multi-Processing Linux – Discussion and examples showing how to configure Linux to manage multiple processors.
  • Day 2

  • Yocto and PetaLinux – Compares and contrasts the kernel building methods between a "pure" Yocto build and the PetaLinux build (which uses Yocto "under-the-hood")
  • Open Source Library/PetaLinux Tools – Introduction to open-source Linux and the effort and risk-reducing PetaLinux tools.
  • Zynq UltraScale+ MPSoC FreeRTOS – Overview of FreeRTOS with examples of how it can be used.
  • Zynq UltraScale+ MPSoC Software Stack – Introduction to what a software stack is and a number of stacks used with the Zynq UltraScale+ MPSoC.
  • Zynq UltraScale+ MPSoC PMU Development and Debugging – Investigation into the the tools and techniques for debugging a Zynq UltraScale+ MPSoC device.
  • Zynq UltraScale+ MPSoC Power Management – Overview of the PMU and the power-saving features of the device.
  • Zynq UltraScale+ MPSoC Boot and Configuration – How to implement the embedded system, including the boot process and boot image creation.
  • Event Schedule

    so-logic (top1) (Austria)
    • 04.02. - 05.02.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 25.03. - 26.03.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 06.05. - 07.05.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 24.06. - 25.06.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 12.08. - 13.08.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 30.09. - 01.10.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart
    • 18.11. - 19.11.2019 09:00-17:00 — € 1,500.00 excl. VAT Add to cart

    Partner

    Xilinx
    Updated at: 2018-11-11 14:05to the top